Changes in v2: - Drviers will specify PDC pin as their interrupt and PDC as interrupt parent - Updated driver to pick up PDC pin mappings from DT - Cleanup driver per Marc's suggestions - Addressed DT bindings comments from Rob H - Addressed FTRACE comments from Steven R On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a power domain that can be powered off when not needed. Interrupts that need to be sensed even when the GIC is powered off, are routed through an interrupt controller in an always-on domain called the Power Domain Controller a.k.a PDC. This series adds support for the PDC's interrupt controller. Please consider reviewing these patches. RFC v1: https://patchwork.kernel.org/patch/10180857/ Lina Iyer (3): drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs dt-bindings/interrupt-controller: pdc: descibe PDC device binding drivers: irqchip: pdc: log PDC info in FTRACE .../bindings/interrupt-controller/qcom,pdc.txt | 78 +++++ drivers/irqchip/Kconfig | 9 + drivers/irqchip/Makefile | 1 + drivers/irqchip/qcom-pdc.c | 333 +++++++++++++++++++++ include/trace/events/pdc.h | 55 ++++ 5 files changed, 476 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt create mode 100644 drivers/irqchip/qcom-pdc.c create mode 100644 include/trace/events/pdc.h -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
