Rev 3.1 Sec 2.3.1 Request Handling Rules indicates that a device can issue CRS following secondary bus reset. Handle device presence gracefully. Signed-off-by: Sinan Kaya <okaya@xxxxxxxxxxxxxx> Reviewed-by: Christoph Hellwig <hch@xxxxxx> --- drivers/pci/pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index eae04aa..2c9e9a9 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4161,7 +4161,7 @@ int pci_reset_bridge_secondary_bus(struct pci_dev *dev) { pcibios_reset_secondary_bus(dev); - return 0; + return pci_dev_wait(dev, "bus reset", PCIE_RESET_READY_POLL_MS); } EXPORT_SYMBOL_GPL(pci_reset_bridge_secondary_bus); -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html