On 12/01, Will Newton wrote: > On Wed, Nov 29, 2017 at 6:50 PM, Stephen Boyd <sboyd@xxxxxxxxxxxxxx> wrote: > > > It's not completely insane to support this SoC upstream though. You'd > > have to bring in the pinctrl and clk drivers, which may be a bit of > > effort. After that it should mostly be enabling various devices by > > adding DT nodes and testing things out. It looks like this is 32-bit, so > > getting SMP support may require some tweaks to the smp_ops code for qcom > > platforms. You're right that it isn't too different from msm8916, so it > > may be that most of the driver support for that SoC transfers over > > nicely to this one. > > I've started from the 8916 drivers and started to port in the changes > from the 3.18 tree that seem relevant. I have a kernel that boots and > talks over the serial. I've done a bunch of pinctrl although it is not > complete yet. I've had a look at the clocks and got the PLL working > but I think I'm probably missing a document that describes the > clocking architecture in more detail (I have the register reference > but that's a bit of a worm's eye view). > > The current issue I am experiencing is the first write to an SPMI > channel causes the board to reset. I suspect this means that I have > not setup clocks correctly somewhere? The SPMI controller typically always has clks enabled, so I would be surprised if the clk was off. More likely, you're attempting to read/write a channel that is locked down and triggering an access control violation. Something configured incorrectly in DT perhaps? -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
