Has anyone had a chance to look at this yet - I'd appreciate any comments. Thanks, Neil On 1/16/2017 1:52 PM, Neil Leeder wrote:
Adds perf events support for L2 cache PMU. The L2 cache PMU driver is named 'l2cache_0' and can be used with perf events to profile L2 events such as cache hits and misses on Qualcomm Technologies processors. Signed-off-by: Neil Leeder <nleeder@xxxxxxxxxxxxxx> --- v8: Various style changes for function names & code restructuring Replace dev_warn with ratelimited debug prints Move hotplug registration before PMU registration Reload counters with a fixed value Add column-exclusion check for events in same group Rebase on 4.10-rc3
-- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html