[RESEND PATCH v4 1/7] remoteproc: qcom: Add and initialize private data for hexagon dsp.

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Resource string's specific to version of hexagon chip are initialized
to be passed to probe for various resource init purpose.
Also compatible string introduced are added to documentation.

Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@xxxxxxxxxxxxxx>
---
 .../devicetree/bindings/remoteproc/qcom,q6v5.txt   |  2 +
 drivers/remoteproc/qcom_q6v5_pil.c                 | 61 +++++++++++++++++++++-
 2 files changed, 62 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 57cb49e..d4c14f0 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -8,6 +8,8 @@ on the Qualcomm Hexagon core.
 	Value type: <string>
 	Definition: must be one of:
 		    "qcom,q6v5-pil"
+		"qcom,q6v5-5-1-1-pil"
+		"qcom,q6v56-1-5-0-pil"
 
 - reg:
 	Usage: required
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c
index 2e0caaa..3360312 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -30,6 +30,7 @@
 #include <linux/reset.h>
 #include <linux/soc/qcom/smem.h>
 #include <linux/soc/qcom/smem_state.h>
+#include <linux/of_device.h>
 
 #include "remoteproc_internal.h"
 #include "qcom_mdt_loader.h"
@@ -93,6 +94,22 @@
 #define QDSS_BHS_ON			BIT(21)
 #define QDSS_LDO_BYP			BIT(22)
 
+struct rproc_hexagon_res {
+	char *hexagon_mba_image;
+	char **proxy_reg_string;
+	char **active_reg_string;
+	int proxy_uV_uA[3][2];
+	int active_uV_uA[1][2];
+	char **proxy_clk_string;
+	char **active_clk_string;
+	int hexagon_ver;
+};
+
+struct reg_info {
+	struct regulator *reg;
+	int uV;
+	int uA;
+};
 struct q6v5 {
 	struct device *dev;
 	struct rproc *rproc;
@@ -131,6 +148,12 @@ struct q6v5 {
 };
 
 enum {
+	Q6V5_5_0_0, /*hexagon on msm8916*/
+	Q6V5_5_1_1, /*hexagon on msm8974*/
+	Q5V56_1_5_0, /*hexagon on msm8996*/
+};
+
+enum {
 	Q6V5_SUPPLY_CX,
 	Q6V5_SUPPLY_MX,
 	Q6V5_SUPPLY_MSS,
@@ -890,8 +913,44 @@ static int q6v5_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static const struct rproc_hexagon_res q6v56_1_5_0_res = {
+	.hexagon_mba_image = "mba.mbn",
+	.proxy_reg_string = (char*[]){"mx", "cx", "pll", NULL},
+	.active_reg_string = NULL,
+	.proxy_uV_uA = { {0, 0}, {0, 100000}, {0, 100000} },
+	.active_uV_uA = { {0} },
+	.proxy_clk_string = (char*[]){"xo", "pnoc", "qdss", NULL},
+	.active_clk_string = (char*[]){"iface", "bus", "mem",
+		"gpll0_mss_clk", "snoc_axi_clk", "mnoc_axi_clk", NULL},
+	.hexagon_ver = Q5V56_1_5_0,
+};
+
+static const struct rproc_hexagon_res q6v5_5_0_0_res = {
+	.hexagon_mba_image = "mba.mbn",
+	.proxy_reg_string = (char*[]){"mx", "cx", "pll", NULL},
+	.proxy_uV_uA = { {1050000, 0}, {0, 100000}, {0, 100000} },
+	.active_reg_string = (char*[]){"mss", NULL},
+	.active_uV_uA = { {1000000, 100000} },
+	.proxy_clk_string = (char*[]){"xo", NULL},
+	.active_clk_string = (char*[]){"iface", "bus", "mem", NULL},
+	.hexagon_ver = Q6V5_5_0_0,
+};
+
+static const struct rproc_hexagon_res q6v5_5_1_1_res = {
+	.hexagon_mba_image = "mba.b00",
+	.proxy_reg_string = (char*[]){"mx", "cx", "pll", NULL},
+	.proxy_uV_uA = { {1050000, 0}, {0, 100000}, {0, 100000} },
+	.active_reg_string = (char*[]){"mss", NULL},
+	.active_uV_uA = { {1000000, 100000} },
+	.proxy_clk_string = (char*[]){"xo", NULL},
+	.active_clk_string = (char*[]){"iface", "bus", "mem", NULL},
+	.hexagon_ver = Q6V5_5_1_1,
+};
+
 static const struct of_device_id q6v5_of_match[] = {
-	{ .compatible = "qcom,q6v5-pil", },
+	{ .compatible = "qcom,q6v5-pil", .data = &q6v5_5_0_0_res},
+	{ .compatible = "qcom,q6v5-5-1-1-pil", .data = &q6v5_5_1_1_res},
+	{ .compatible = "qcom,q6v56-1-5-0-pil", .data = &q6v56_1_5_0_res},
 	{ },
 };
 
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

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