Add schema to properly describe the SPS SIC block present on APQ8064 and several similar platforms. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx> --- .../devicetree/bindings/soc/qcom/qcom,sps-sic.yaml | 38 ++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,sps-sic.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,sps-sic.yaml new file mode 100644 index 0000000000000000000000000000000000000000..ccacf6f45955177dd9302107e09897bfa2f1fd78 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,sps-sic.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,sps-sic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Smart Peripheral System Interrupt Controller + +maintainers: + - Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx> + - Bjorn Andersson <andersson@xxxxxxxxxx> + +description: + Smart Peripheral System (SPS) Interrupt Controller (SIC) + +properties: + compatible: + items: + - const: qcom,apq8064-sps-sic + - const: syscon + + reg: + items: + - description: SPS SIC register block + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + interrupt-controller@12100000 { + compatible = "qcom,apq8064-sps-sic", "syscon"; + reg = <0x12100000 0x10000>; + }; +... -- 2.39.5
