On Thu, Mar 06, 2025 at 11:33:46AM -0800, Abhinav Kumar wrote: > > > On 3/5/2025 10:44 PM, Dmitry Baryshkov wrote: > > On Wed, Mar 05, 2025 at 07:16:51PM -0800, Jessica Zhang wrote: > > > Similar to WB_MUX, CDM_MUX also needs to be adjusted to support > > > dedicated CWB PINGPONGs > > > > > > Signed-off-by: Jessica Zhang <quic_jesszhan@xxxxxxxxxxx> > > > --- > > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c | 4 +++- > > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c > > > index ae1534c49ae0..3f88c3641d4a 100644 > > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c > > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c > > > @@ -214,7 +214,9 @@ static void dpu_hw_cdm_bind_pingpong_blk(struct dpu_hw_cdm *ctx, const enum dpu_ > > > mux_cfg = DPU_REG_READ(c, CDM_MUX); > > > mux_cfg &= ~0xf; > > > - if (pp) > > > + if (pp >= PINGPONG_CWB_0) > > > + mux_cfg |= 0xd; > > > > Shouldn't it be 0xb for PINGPONG_CWB_2 and 3? > > > > No, this register CDM_MUX can take only 0xd for CWB PPs. > > 0xb is not listed as a valid value at all. Thanks for the confirmation. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> > > > > + else if (pp) > > > mux_cfg |= (pp - PINGPONG_0) & 0x7; > > > else > > > mux_cfg |= 0xf; > > > > > > --- > > > base-commit: 6d3175a72cc07e90f81fb35841048a8a9b5134cb > > > change-id: 20250305-cdm-cwb-mux-fix-69ed5297d4f7 > > > > > > Best regards, > > > -- > > > Jessica Zhang <quic_jesszhan@xxxxxxxxxxx> > > > > > > -- With best wishes Dmitry
