On 05/03/2025 14:41, George Moussalem wrote: > From: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx> > > From: Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx> Nope, that's not a correct chain. Apply it yourself and check results. > > Add support for the PCIe controller on the Qualcomm > IPQ5108 SoC to the bindings. > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Also not really correct. I did not provide tag to Nitheesh patch. How the tag was added there? b4? > Signed-off-by: Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx> > Signed-off-by: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx> > Signed-off-by: George Moussalem <george.moussalem@xxxxxxxxxxx> > --- > .../devicetree/bindings/pci/qcom,pcie.yaml | 49 +++++++++++++++++++ > 1 file changed, 49 insertions(+) > ... > + reset-names: > + items: > + - const: pipe # PIPE reset > + - const: sleep # Sleep reset > + - const: sticky # Core sticky reset > + - const: axi_m # AXI master reset > + - const: axi_s # AXI slave reset > + - const: ahb # AHB reset > + - const: axi_m_sticky # AXI master sticky reset > + - const: axi_s_sticky # AXI slave sticky reset > + interrupts: > + minItems: 8 > + interrupt-names: > + minItems: 8 Why is this flexible? > + items: > + - const: msi0 > + - const: msi1 > + - const: msi2 > + - const: msi3 > + - const: msi4 > + - const: msi5 > + - const: msi6 > + - const: msi7 > + - const: global > + Best regards, Krzysztof
