Ideally, the requested duty cycle should never translate to a PWM value higher than the selected resolution (PWM size), but currently the best matched period is never reported back to the PWM consumer, so the consumer will still be using the requested period which is higher than the best matched one. This will result in PWM consumer requesting duty cycle values higher than the allowed PWM value. For example, a consumer might request a period of 5ms while the best (closest) period the PWM hardware will do is 4.26ms. For this best matched resolution, if the selected resolution is 9-bit wide, when the consumer asks for a duty cycle of 5ms, the PWM value will be 600, which is outside of what the resolution allows. Similar will happen if the 6-bit resolution is selected. Since for these normal PWMs (non Hi-Res), the current implementation is capping the PWM value at a 9-bit resolution, even when the 6-bit resolution is selected, the value will be wrapped around to 6-bit value by the HW internal logic. Fix the issue by capping the PWM value to the maximum value allowed by the selected resolution. Fixes: 7a3350495d9a ("leds: rgb: leds-qcom-lpg: Add support for 6-bit PWM resolution") Suggested-by: Anjelique Melendez <anjelique.melendez@xxxxxxxxxxxxxxxx> Reviewed-by: Sebastian Reichel <sre@xxxxxxxxxx> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx> --- drivers/leds/rgb/leds-qcom-lpg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/leds/rgb/leds-qcom-lpg.c b/drivers/leds/rgb/leds-qcom-lpg.c index 4e5c56ded1f0412c9913670699e912b24f3408bd..4454fc6a38480b61916318dd170f3eddc32976d6 100644 --- a/drivers/leds/rgb/leds-qcom-lpg.c +++ b/drivers/leds/rgb/leds-qcom-lpg.c @@ -533,7 +533,7 @@ static void lpg_calc_duty(struct lpg_channel *chan, uint64_t duty) max = LPG_RESOLUTION_15BIT - 1; clk_rate = lpg_clk_rates_hi_res[chan->clk_sel]; } else { - max = LPG_RESOLUTION_9BIT - 1; + max = BIT(lpg_pwm_resolution[chan->pwm_resolution_sel]) - 1; clk_rate = lpg_clk_rates[chan->clk_sel]; } -- 2.34.1