On 3/4/25 01:53, Dmitry Baryshkov wrote:
On Tue, Mar 04, 2025 at 12:55:21AM +0200, Vladimir Zapolskiy wrote:
SM8550 Camera Clock Controller shall enable both MXC and MMCX power
domains.
Are those really required to access the registers of the cammcc? Or is
one of those (MXC?) required to setup PLLs? Also, is this applicable
only to sm8550 or to other similar clock controllers?
Due to the described problem I experience a fatal CPU stall on SM8550-QRD,
not on any SM8450 or SM8650 powered board for instance, however it does
not exclude an option that the problem has to be fixed for other clock
controllers, but it's Qualcomm to confirm any other touched platforms,
for instance x1e80100-camcc has it resolved right at the beginning.
To my understanding here 'required-opps' shall also be generalized, so
the done copy from x1e80100-camcc was improper, and the latter dt-binding
should be fixed.
--
Best wishes,
Vladimir
