On Thu, Feb 20, 2025 at 11:31:49AM +0530, Shradha Todi wrote:
>
>
> > -----Original Message-----
> > From: Manivannan Sadhasivam via B4 Relay <devnull+manivannan.sadhasivam.linaro.org@xxxxxxxxxx>
> > Sent: 18 February 2025 20:07
> > To: Shuai Xue <xueshuai@xxxxxxxxxxxxxxxxx>; Jing Zhang <renyu.zj@xxxxxxxxxxxxxxxxx>; Will Deacon <will@xxxxxxxxxx>; Mark Rutland
> > <mark.rutland@xxxxxxx>; Jingoo Han <jingoohan1@xxxxxxxxx>; Bjorn Helgaas <bhelgaas@xxxxxxxxxx>; Lorenzo Pieralisi
> > <lpieralisi@xxxxxxxxxx>; Krzysztof Wilczyński <kw@xxxxxxxxx>; Rob Herring <robh@xxxxxxxxxx>
> > Cc: Shradha Todi <shradha.t@xxxxxxxxxxx>; linux-kernel@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-perf-
> > users@xxxxxxxxxxxxxxx; linux-pci@xxxxxxxxxxxxxxx; linux-arm-msm@xxxxxxxxxxxxxxx; Manivannan Sadhasivam
> > <manivannan.sadhasivam@xxxxxxxxxx>
> > Subject: [PATCH 1/4] perf/dwc_pcie: Move common DWC struct definitions to 'pcie-dwc.h'
> >
> > From: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> >
> > Since these are common to all Desginware PCIe IPs, move them to a new header, 'pcie-dwc.h' so that other drivers could make use of
> > them.
> >
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> > ---
> > MAINTAINERS | 1 +
> > drivers/perf/dwc_pcie_pmu.c | 23 ++---------------------
> > include/linux/pcie-dwc.h | 34 ++++++++++++++++++++++++++++++++++
> > 3 files changed, 37 insertions(+), 21 deletions(-)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 896a307fa065..b4d09d52a750 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -18123,6 +18123,7 @@ S: Maintained
> > F: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
> > F: Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
> > F: drivers/pci/controller/dwc/*designware*
> > +F: include/linux/pcie-dwc.h
> >
> > PCI DRIVER FOR TI DRA7XX/J721E
> > M: Vignesh Raghavendra <vigneshr@xxxxxx>
> > diff --git a/drivers/perf/dwc_pcie_pmu.c b/drivers/perf/dwc_pcie_pmu.c index cccecae9823f..05b37ea7cf16 100644
> > --- a/drivers/perf/dwc_pcie_pmu.c
> > +++ b/drivers/perf/dwc_pcie_pmu.c
> > @@ -13,6 +13,7 @@
> > #include <linux/errno.h>
> > #include <linux/kernel.h>
> > #include <linux/list.h>
> > +#include <linux/pcie-dwc.h>
> > #include <linux/perf_event.h>
> > #include <linux/pci.h>
> > #include <linux/platform_device.h>
> > @@ -99,26 +100,6 @@ struct dwc_pcie_dev_info {
> > struct list_head dev_node;
> > };
> >
> > -struct dwc_pcie_pmu_vsec_id {
> > - u16 vendor_id;
> > - u16 vsec_id;
> > - u8 vsec_rev;
> > -};
> > -
> > -/*
> > - * VSEC IDs are allocated by the vendor, so a given ID may mean different
> > - * things to different vendors. See PCIe r6.0, sec 7.9.5.2.
> > - */
> > -static const struct dwc_pcie_pmu_vsec_id dwc_pcie_pmu_vsec_ids[] = {
> > - { .vendor_id = PCI_VENDOR_ID_ALIBABA,
> > - .vsec_id = 0x02, .vsec_rev = 0x4 },
> > - { .vendor_id = PCI_VENDOR_ID_AMPERE,
> > - .vsec_id = 0x02, .vsec_rev = 0x4 },
> > - { .vendor_id = PCI_VENDOR_ID_QCOM,
> > - .vsec_id = 0x02, .vsec_rev = 0x4 },
> > - {} /* terminator */
> > -};
> > -
> > static ssize_t cpumask_show(struct device *dev,
> > struct device_attribute *attr,
> > char *buf)
> > @@ -529,7 +510,7 @@ static void dwc_pcie_unregister_pmu(void *data)
> >
> > static u16 dwc_pcie_des_cap(struct pci_dev *pdev) {
> > - const struct dwc_pcie_pmu_vsec_id *vid;
> > + const struct dwc_pcie_vsec_id *vid;
> > u16 vsec;
> > u32 val;
> >
> > diff --git a/include/linux/pcie-dwc.h b/include/linux/pcie-dwc.h new file mode 100644 index 000000000000..261ae11d75a4
> > --- /dev/null
> > +++ b/include/linux/pcie-dwc.h
> > @@ -0,0 +1,34 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * Copyright (C) 2021-2023 Alibaba Inc.
> > + *
> > + * Copyright 2025 Linaro Ltd.
> > + * Author: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> > + */
> > +
> > +#ifndef LINUX_PCIE_DWC_H
> > +#define LINUX_PCIE_DWC_H
> > +
> > +#include <linux/pci_ids.h>
> > +
> > +struct dwc_pcie_vsec_id {
> > + u16 vendor_id;
> > + u16 vsec_id;
> > + u8 vsec_rev;
> > +};
> > +
> > +/*
> > + * VSEC IDs are allocated by the vendor, so a given ID may mean
> > +different
> > + * things to different vendors. See PCIe r6.0, sec 7.9.5.2.
> > + */
> > +static const struct dwc_pcie_vsec_id dwc_pcie_pmu_vsec_ids[] = {
>
> Rename this to dwc_pcie_rasdes_vsec_ids? pmu was perf file specific but technically the vsec is rasdes.
>
Sure.
- Mani
--
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