On 14/01/2025 07:59, Yongxing Mou wrote:
> + mdss_dp0_phy: phy@aec2a00 {
> + compatible = "qcom,qcs8300-edp-phy", "qcom,sa8775p-edp-phy";
> +
> + reg = <0x0 0x0aec2a00 0x0 0x19c>,
> + <0x0 0x0aec2200 0x0 0xec>,
> + <0x0 0x0aec2600 0x0 0xec>,
> + <0x0 0x0aec2000 0x0 0x1c8>;
> +
> + clocks = <&dispcc MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
> + <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>;
> + clock-names = "aux",
> + "cfg_ahb";
> +
> + power-domains = <&rpmhpd RPMHPD_MX>;
> +
> + #clock-cells = <1>;
> + #phy-cells = <0>;
> +
> + status = "disabled";
> + };
> +
> + mdss_dp0: displayport-controller@af54000 {
> + compatible = "qcom,qcs8300-dp", "qcom,sm8650-dp";
NAK. This is not correct.
You are sending known wrong code. Known by you.
Best regards,
Krzysztof
