On Wed, Feb 05, 2025 at 06:27:37PM +0000, Raviteja Laggyshetty wrote: > Add Epoch Subsystem (EPSS) L3 interconnect provider binding on > SA8775P SoCs. > The L3 instance on the SA8775P SoC is similar to those on SoCs > like SM8250 and SC7280. These SoCs use the PERF register instead > of L3_REG for programming the performance level, which is managed > in the data associated with the target-specific compatibles. > Since the hardware remains the same across all EPSS-supporting SoCs, > the generic compatible is retained for all SoCs. > > Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@xxxxxxxxxxx> > --- > Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
