On 03/02/2025 12:38, Danila Tikhonov wrote:
When using primary mi2s on sc8280xp-compatible SoCs, the correct clock
needs to get enabled to be able to use the mi2s interface.
Signed-off-by: Danila Tikhonov <danila@xxxxxxxxxxx>
---
sound/soc/qcom/sc8280xp.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/sound/soc/qcom/sc8280xp.c b/sound/soc/qcom/sc8280xp.c
index 311377317176..03687de1ebb0 100644
--- a/sound/soc/qcom/sc8280xp.c
+++ b/sound/soc/qcom/sc8280xp.c
@@ -14,6 +14,8 @@
#include "common.h"
#include "sdw.h"
+#define MI2S_BCLK_RATE 1536000
+
struct sc8280xp_snd_data {
bool stream_prepared[AFE_PORT_MAX];
struct snd_soc_card *card;
@@ -25,13 +27,24 @@ struct sc8280xp_snd_data {
static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd)
{
+ unsigned int codec_dai_fmt = SND_SOC_DAIFMT_BC_FC;
+ unsigned int fmt = SND_SOC_DAIFMT_BP_FP;
struct sc8280xp_snd_data *data = snd_soc_card_get_drvdata(rtd->card);
+ struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);
struct snd_soc_card *card = rtd->card;
struct snd_soc_jack *dp_jack = NULL;
int dp_pcm_id = 0;
switch (cpu_dai->id) {
+ case PRIMARY_MI2S_RX:
+ codec_dai_fmt |= SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S;
+ snd_soc_dai_set_sysclk(cpu_dai,
+ Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
+ MI2S_BCLK_RATE, SNDRV_PCM_STREAM_PLAYBACK);
How is this possible ? sc8280xp uses the q6prm clock driver, and there's no
way this call sets the Q6PRM_LPASS_CLK_ID_PRI_MI2S_IBIT, or I totally missed
something.
And prm is neither a dai nor has the set_sysclk callback.
Neil
+ snd_soc_dai_set_fmt(cpu_dai, fmt);
+ snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt);
+ break;
case WSA_CODEC_DMA_RX_0:
case WSA_CODEC_DMA_RX_1:
/*
