On 28.01.2025 8:34 AM, Krzysztof Kozlowski wrote: > On 27/01/2025 10:31, Sricharan R wrote: >> From: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx> >> >> The CPU core in ipq5424 is clocked by a huayra PLL with RCG support. >> The RCG and PLL have a separate register space from the GCC. >> Also the L3 cache has a separate pll and needs to be scaled along >> with the CPU. >> >> Co-developed-by: Md Sadre Alam <quic_mdalam@xxxxxxxxxxx> >> Signed-off-by: Md Sadre Alam <quic_mdalam@xxxxxxxxxxx> >> Signed-off-by: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx> > > Considering that there were multiple conflicting patches coming from > Qualcomm around IPQ SoCs and that we are in the merge window, I will > skip this patch. I think you confused this with something else, I don't see any other IPQ clock patches Konrad
