On 15.01.2025 2:44 PM, Neil Armstrong wrote: > The PCIe bus interconnect path can be scaled depending on the > PCIe link established, add the OPP table with all the possible > link speeds and the associated power domain level. > > Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx> Konrad
