On Wed, 04 Dec 2024 11:37:12 -0800, Melody Olvera wrote: > Add GCC, RPMH, and TCSR clocks for the SM8750 SoC. > > The Qualcomm Technologies, Inc. SM8750 SoC is the latest in the line of > consumer mobile device SoCs. See more at: > https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/images/company/news-media/media-center/press-kits/snapdragon-summit-2024/day-1/documents/Snapdragon8EliteProductBrief.pdf > > Changes in V3: > - removed unused rfclka4 and rfclka5 from clk-rpmh [Dmitry] > - split the SC7280 match table to a new commit [Dmitry] > - There are bindings difference between SM8650 and SM8750, so bring back > the v1 binding https://patchwork.kernel.org/project/linux-clk/patch/20241021230359.2632414-5-quic_molvera@xxxxxxxxxxx/ > and fix the unused bindings. > - Update the DT indexes as per the GCC bindings > - Use the qcom_cc_probe() instead of qcom_cc_really_probe() for TCSRCC [Dmitry] > > [...] Applied, thanks! [1/8] dt-bindings: clock: qcom-rpmhcc: Add RPMHCC for SM8750 commit: 6badb455ae983f4b2b7e91e3083db64765662a6c [2/8] clk: qcom: rpmh: Sort the match table alphabetically commit: d7df7a718fd661960f268ef353fdca66fc693f3d [3/8] clk: qcom: rpmh: Add support for SM8750 rpmh clocks commit: c035a9e265dd80a018cfde0fd07ceca9e1d07c98 [4/8] clk: qcom: clk-alpha-pll: Add support for controlling Taycan PLLs commit: 745d755b8551319a100adafc6e776a2766102ea9 [6/8] clk: qcom: Add support for GCC on SM8750 commit: 3267c774f3ff61fc945a7531b2ae6784c37cd14f [8/8] clk: qcom: Add TCSR clock driver for SM8750 commit: 806761852608ebc4d924c2e1c031fb72dcb33ed0 Best regards, -- Bjorn Andersson <andersson@xxxxxxxxxx>
