On Wed, Oct 16, 2024 at 06:21:16PM -0700, Jessica Zhang wrote:
> The CWB mux has its own registers and set of operations. Add dpu_hw_cwb
> abstraction to allow driver to configure the CWB mux.
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> Signed-off-by: Jessica Zhang <quic_jesszhan@xxxxxxxxxxx>
> ---
> drivers/gpu/drm/msm/Makefile | 1 +
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.c | 73 +++++++++++++++++++++++++++++
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.h | 70 +++++++++++++++++++++++++++
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 5 +-
> 4 files changed, 148 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
> index de7cf60d206241ac03d7e744e048cbfd845f6cc9..26bacd93a148288849d5076c73ef4f294ff2c188 100644
> --- a/drivers/gpu/drm/msm/Makefile
> +++ b/drivers/gpu/drm/msm/Makefile
> @@ -78,6 +78,7 @@ msm-display-$(CONFIG_DRM_MSM_DPU) += \
> disp/dpu1/dpu_hw_catalog.o \
> disp/dpu1/dpu_hw_cdm.o \
> disp/dpu1/dpu_hw_ctl.o \
> + disp/dpu1/dpu_hw_cwb.o \
> disp/dpu1/dpu_hw_dsc.o \
> disp/dpu1/dpu_hw_dsc_1_2.o \
> disp/dpu1/dpu_hw_interrupts.o \
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.c
> new file mode 100644
> index 0000000000000000000000000000000000000000..5fbf52906ea94847a8eb3fcaa372e582dce2357c
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.c
> @@ -0,0 +1,73 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved
> + */
> +
> +#include <drm/drm_managed.h>
> +#include "dpu_hw_cwb.h"
> +
> +#define CWB_MUX 0x000
> +#define CWB_MODE 0x004
> +
> +/* CWB mux block bit definitions */
> +#define CWB_MUX_MASK GENMASK(3, 0)
> +#define CWB_MODE_MASK GENMASK(2, 0)
> +
> +static void dpu_hw_cwb_config(struct dpu_hw_cwb *ctx,
> + struct dpu_hw_cwb_setup_cfg *cwb_cfg)
> +{
> + struct dpu_hw_blk_reg_map *c = &ctx->hw;
> + int cwb_mux_cfg = 0xF;
> + enum dpu_pingpong pp;
> + enum cwb_mode_input input;
> +
> + if (!cwb_cfg)
> + return;
> +
> + input = cwb_cfg->input;
> + pp = cwb_cfg->pp_idx;
> +
> + if (input >= INPUT_MODE_MAX)
> + return;
> +
> + /*
> + * The CWB_MUX register takes the pingpong index for the real-time
> + * display
> + */
> + if ((pp != PINGPONG_NONE) && (pp < PINGPONG_MAX))
> + cwb_mux_cfg = FIELD_PREP(CWB_MUX_MASK, pp - PINGPONG_0);
> +
> + input = FIELD_PREP(CWB_MODE_MASK, input);
Without #include <linux/bitfield.h> this triggers an error on some
platforms as reported by LKP. I'll fix that in place.
> +
> + DPU_REG_WRITE(c, CWB_MUX, cwb_mux_cfg);
> + DPU_REG_WRITE(c, CWB_MODE, input);
> +}
> +
--
With best wishes
Dmitry
