Add the watchdog node for QCS8300 SoC. This patch depends on below patch series: https://lore.kernel.org/linux-arm-msm/20241203-qcs8300_initial_dtsi-v4-0-d7c953484024@xxxxxxxxxxx/ Signed-off-by: Xin Liu <quic_liuxin@xxxxxxxxxxx> --- Changes in v4: - Patch dt-bindings is already applied. - Move sleep_clk to SoC DT. - Link to v3: https://lore.kernel.org/linux-arm-msm/20241125093503.1162412-1-quic_liuxin@xxxxxxxxxxx/ Changes in v3: - PATCH 3/3:Add \n at the last line of the file. - Link to v2: https://lore.kernel.org/linux-arm-msm/20241119102315.3167607-1-quic_liuxin@xxxxxxxxxxx/ Changes in v2: - PATCH 1/3:Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> - PATCH 2/3:Drop the Reviewed-by tag that received by v1. Assign a label to the wachdog node. - Link to v1: https://lore.kernel.org/all/20241029031222.1653123-1-quic_liuxin@xxxxxxxxxxx/ Signed-off-by: Xin Liu <quic_liuxin@xxxxxxxxxxx> --- arch/arm64/boot/dts/qcom/qcs8300.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) --- base-commit: f486c8aa16b8172f63bddc70116a0c897a7f3f02 diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi index 73abf2ef9c9f..c0efcd98ec65 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi @@ -1148,6 +1148,13 @@ intc: interrupt-controller@17a00000 { redistributor-stride = <0x0 0x20000>; }; + watchdog@17c10000 { + compatible = "qcom,apss-wdt-qcs8300", "qcom,kpss-wdt"; + reg = <0x0 0x17c10000 0x0 0x1000>; + clocks = <&sleep_clk>; + interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>; + }; + timer@17c20000 { compatible = "arm,armv7-timer-mem"; reg = <0x0 0x17c20000 0x0 0x1000>; -- 2.34.1