On 11.12.2024 6:59 PM, Barnabás Czémán wrote: > From: Otto Pflüger <otto.pflueger@xxxxxxxxx> > > Add initial support for MSM8917 SoC. > > Signed-off-by: Otto Pflüger <otto.pflueger@xxxxxxxxx> > [reword commit, rebase, fix schema errors] > Signed-off-by: Barnabás Czémán <barnabas.czeman@xxxxxxxxxxxxxx> > --- > + > + cpu0: cpu@100 { > + device_type = "cpu"; > + compatible = "arm,cortex-a53"; > + reg = <0x100>; > + next-level-cache = <&l2_0>; > + enable-method = "psci"; > + clocks = <&apcs>; > + operating-points-v2 = <&cpu_opp_table>; > + #cooling-cells = <2>; > + power-domains = <&cpu_pd0>; > + power-domain-names = "psci"; > + }; > + > + l2_0: l2-cache { > + compatible = "cache"; > + cache-level = <2>; > + cache-unified; > + }; By "under CPU node", I meant as a subnode ;) See sm8650.dtsi for reference [...] > + > + sdc1_default: sdc1-default-state { > + clk-pins { > + pins = "sdc1_clk"; > + bias-disable; > + drive-strength = <16>; > + }; > + cmd-pins { Please separate these subnodes with a newline [...] > + > + apps_iommu: iommu@1e20000 { > + #address-cells = <1>; > + #size-cells = <1>; > + #iommu-cells = <1>; > + compatible = "qcom,msm8917-iommu", "qcom,msm-iommu-v1"; > + ranges = <0 0x01e20000 0x20000>; 'compatible' should come first [...] > + intc: interrupt-controller@b000000 { > + compatible = "qcom,msm-qgic2"; > + interrupt-controller; > + #interrupt-cells = <3>; > + reg = <0x0b000000 0x1000>, > + <0x0b002000 0x1000>; > + }; and 'reg' just after it Otherwise looking fairly good! Konrad