On 12.12.2024 10:36 PM, Neil Armstrong wrote:
> On 12/12/2024 21:32, Konrad Dybcio wrote:
>> On 11.12.2024 9:29 AM, Neil Armstrong wrote:
>>> Now all the DDR bandwidth voting via the GPU Management Unit (GMU)
>>> is in place, declare the Bus Control Modules (BCMs) and the
>>> corresponding parameters in the GPU info struct.
>>>
>>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
>>> Reviewed-by: Akhil P Oommen <quic_akhilpo@xxxxxxxxxxx>
>>> Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
>>> ---
>>> drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 22 ++++++++++++++++++++++
>>> 1 file changed, 22 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
>>> index 0c560e84ad5a53bb4e8a49ba4e153ce9cf33f7ae..edffb7737a97b268bb2986d557969e651988a344 100644
>>> --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
>>> +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
>>> @@ -1388,6 +1388,17 @@ static const struct adreno_info a7xx_gpus[] = {
>>> .pwrup_reglist = &a7xx_pwrup_reglist,
>>> .gmu_chipid = 0x7020100,
>>> .gmu_cgc_mode = 0x00020202,
>>> + .bcms = (const struct a6xx_bcm[]) {
>>> + { .name = "SH0", .buswidth = 16 },
>>
>> All a7xx targets use the same BCMs with the only difference being
>> the ACV voting mask. You may want to make these non-anonymous structs.
>
> it can be done in a second step
>
>>
>>> + { .name = "MC0", .buswidth = 4 },
>>> + {
>>> + .name = "ACV",
>>> + .fixed = true,
>>> + .perfmode = BIT(3),
>>> + .perfmode_bw = 16500000,
>>
>> I think perfmode is simply supposed to be set when bw == max_bw
>
> Not for a750
Akhil, is there any way to determine a suitable OPP for this
dynamically?
Konrad
