On 12/2/2024 7:34 PM, Konrad Dybcio wrote:
On 2.12.2024 1:55 PM, Mukesh Kumar Savaliya wrote:
On 12/2/2024 4:34 PM, Krzysztof Kozlowski wrote:
On 02/12/2024 11:38, Mukesh Kumar Savaliya wrote:
Come with one flag or enum, if needed, covering all your cases like this.
Let me explain, this feature is one of the additional software case
adding on base protocol support. if we dont have more than one usecase
or repurposing this feature, why do we need to add enums ? I see one
flag gpi_mode but it's internal to driver not exposed to user or expose
any usecase/feature.
Below was our earlier context, just wanted to add for clarity.
--
> Is sharing of IP blocks going to be also for other devices? If yes, then
> this should be one property for all Qualcomm devices. If not, then be
> sure that this is the case because I will bring it up if you come with
> one more solution for something else.
You keep repeating the same. You won't receive any other answer.
So far i was in context to SEs. I am not sure in qualcomm SOC all cores supporting this feature and if it at all it supports, it may have it's own mechanism then what is followed in SE IP. I was probably thinking on my owned IP core hence i was revolving around.
Hope this dt-binding i can conclude somewhere by seeking answer from other IP core owners within qualcomm.
>
IP blocks like SE can be shared. Here we are talking about I2C sharing.
In future it can be SPI sharing. But design wise it fits better to add
flag per SE node. Same we shall be adding for SPI too in future.
How flag per SE node is relevant? I did not ask to move the property.
Please let me know your further suggestions.
We do not talk about I2C or SPI here only. We talk about entire SoC.
Since beginning. Find other patch proposals and align with rest of
Qualcomm developers so that you come with only one definition for this
feature/characteristic. Or do you want to say that I am free to NAK all
further properties duplicating this one?
I'm not sure a single property name+description can fit all possible
cases here. The hardware being "shared" can mean a number of different
things, with some blocks having hardware provisions for that, while
others may have totally none and rely on external mechanisms (e.g.
a shared memory buffer) to indicate whether an external entity
manages power to them.
I agree. Also i checked internally with UFS team and other peripheral
core. Not heard of core being shared the way SE is being shared.
Even here, I'm not particularly sure whether dt is the right place.
Maybe we could think about checking for clock_is_enabled()? That's
just an idea, as it may fall apart if CCF gets a .sync_state impl.
I feel DT flag is the only way as one or other way this leads to some
need of prior knowledge. in case of using clock_is_enabled() kind of
API, we still need a flag to keep the clock enabled. By the way, we keep
pinctrl only enabled for shared SE.
Please let me know if the given binding can be improved further OR this
looks fine ?
Konrad
