On Thu, Dec 05, 2024 at 08:31:47PM -0800, Abhinav Kumar wrote:
> p1 register block is needed for the second mst stream.
> Add support in the catalog to be able to program this block.
>
> Signed-off-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
> ---
> drivers/gpu/drm/msm/dp/dp_catalog.c | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
> @@ -145,6 +148,26 @@ static inline u32 msm_dp_read_p0(struct msm_dp_catalog_private *catalog,
> return readl_relaxed(catalog->io.p0.base + offset);
> }
>
> +static inline void msm_dp_write_p1(struct msm_dp_catalog_private *catalog,
> + u32 offset, u32 data)
> +{
> + /*
> + * To make sure interface reg writes happens before any other operation,
> + * this function uses writel() instread of writel_relaxed()
> + */
> + writel(data, catalog->io.p1.base + offset);
> +}
> +
> +static inline u32 msm_dp_read_p1(struct msm_dp_catalog_private *catalog,
> + u32 offset)
> +{
> + /*
> + * To make sure interface reg writes happens before any other operation,
> + * this function uses writel() instread of writel_relaxed()
> + */
> + return readl_relaxed(catalog->io.p1.base + offset);
> +}
After looking at the actual code, please implement
msm_dp_read_pn(stream_id) / msm_dp_write_pn(stream_id)
> +
> static inline u32 msm_dp_read_link(struct msm_dp_catalog_private *catalog, u32 offset)
> {
> return readl_relaxed(catalog->io.link.base + offset);
--
With best wishes
Dmitry
