On 11/21/2024 5:21 PM, Krzysztof Kozlowski wrote:
> On 21/11/2024 12:30, Raviteja Laggyshetty wrote:
>> The EPSS instance in SA8775P uses PERF_STATE register instead of
>> REG_L3_VOTE to scale L3 clocks.
>> Along with SoC specific compatible, add new generic compatible
>> "qcom,epss-l3-perf" for PERF_STATE register based L3 scaling.
>>
>> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@xxxxxxxxxxx>
>> ---
>> drivers/interconnect/qcom/osm-l3.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c
>> index a9405b7d251b..285afaa1f61e 100644
>> --- a/drivers/interconnect/qcom/osm-l3.c
>> +++ b/drivers/interconnect/qcom/osm-l3.c
>> @@ -318,6 +318,7 @@ static int qcom_osm_l3_probe(struct platform_device *pdev)
>>
>> static const struct of_device_id osm_l3_of_match[] = {
>> { .compatible = "qcom,epss-l3", .data = &epss_l3_l3_vote },
>> + { .compatible = "qcom,epss-l3-perf", .data = &epss_l3_perf_state },
>
>
> Hm? Why?
>
>> { .compatible = "qcom,osm-l3", .data = &osm_l3 },
>> { .compatible = "qcom,sc7180-osm-l3", .data = &osm_l3 },
>> { .compatible = "qcom,sc7280-epss-l3", .data = &epss_l3_perf_state },
>> @@ -325,6 +326,7 @@ static const struct of_device_id osm_l3_of_match[] = {
>> { .compatible = "qcom,sm8150-osm-l3", .data = &osm_l3 },
>> { .compatible = "qcom,sc8180x-osm-l3", .data = &osm_l3 },
>> { .compatible = "qcom,sm8250-epss-l3", .data = &epss_l3_perf_state },
>> + { .compatible = "qcom,sa8775p-epss-l3", .data = &epss_l3_perf_state },
>
>
> So this is compatible with sm8250. Use that one. Don't grow this table
> needlessly.
>
Will make use of sm8250 compatible in next patch revision.
>
> Best regards,
> Krzysztof
