Document the Last Level Cache Controller on IPQ5424. The
'broadcast' register space is present only in chipsets that have
multiple instances of LLCC IP. Since IPQ5424 has only one
instance, both the LLCC and LLCC_BROADCAST points to the same
register space.
Hence, allow only '1' reg & reg-names entry for IPQ5424.
Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx>
Signed-off-by: Varadarajan Narayanan <quic_varada@xxxxxxxxxxx>
---
v4: Fix ipq5424-llcc placement according to the sort order
v3: Rebase to ToT
v2: Add Reviewed-by
---
.../devicetree/bindings/cache/qcom,llcc.yaml | 20 +++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
index 03b1941eaa33..e5effbb4a606 100644
--- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
@@ -20,6 +20,7 @@ description: |
properties:
compatible:
enum:
+ - qcom,ipq5424-llcc
- qcom,qcs615-llcc
- qcom,qcs8300-llcc
- qcom,qdu1000-llcc
@@ -42,11 +43,11 @@ properties:
- qcom,x1e80100-llcc
reg:
- minItems: 2
+ minItems: 1
maxItems: 10
reg-names:
- minItems: 2
+ minItems: 1
maxItems: 10
interrupts:
@@ -66,6 +67,21 @@ required:
- reg-names
allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq5424-llcc
+ then:
+ properties:
+ reg:
+ items:
+ - description: LLCC0 base register region
+ reg-names:
+ items:
+ - const: llcc0_base
+
- if:
properties:
compatible:
--
2.34.1
