This series adds the DPTX0 and DPTX1 nodes, as a part of mdss0 on Qualcomm SA8775P SoC. It also enables Display Port on Qualcomm SA8775P-ride platform. --- This patch depends on following series: https://lore.kernel.org/all/20240816-sa8775p-mm-v3-v1-0-77d53c3c0cef@xxxxxxxxxxx/ https://lore.kernel.org/all/20241019-patchv3_1-v5-0-d2fb72c9a845@xxxxxxxxxxx/ https://lore.kernel.org/all/20241018070706.28980-1-quic_mukhopad@xxxxxxxxxxx/ v2: Fixed review comments from Dmitry, Konrad and Bjorn - Added a new patchset to separate out the soc and board parts.[Konrad] - Patchset 1 now comprises of the soc parts and patchset 2 includes board specific changes.[Bjorn] - Patchset 2 enables all the DP ports validated on the sa8775p-ride platform.[Bjorn] - Fixed indentation errors in the dtsi file containing the soc information.[Dmitry][Konrad] - Updated clocks to be used by respective PHYs.[Dmitry] - Added mdss0_dp1 device node.[Dmitry] - Updated the names of PHYs using label prefix "mdssM_dpN" for clarity.[Bjorn] - Avoided use of referring any label in the board(dts) file in the dtsi(platform) file.[Bjorn] v3: Fixed review comments from Dmitry and other minor changes to prevent warnings and maintain alignment - Added specific DP connector node for each DP port validated in patchset 2.[Dmitry] - Updated the reg value to 1 for port 1 under mdss_mdp in patchset 1. - Fixed the register address space for mdss0_dp1 and mdss0_dp1_phy in alignment to the register address space for mdss0_dp0 and mdss0_dp0_phy, in patchset 1. v4: Fixed review comments from Dmitry - Added p1 region to the register set of both mdss_dp0 and mdss_dp1 alongside validation of devicetree against DT schema.[Dmitry] --- Soutrik Mukhopadhyay (2): arm64: dts: qcom: sa8775p: add DisplayPort device nodes arm64: dts: qcom: sa8775p-ride: Enable Display Port arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 80 ++++++++ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 218 ++++++++++++++++++++- 2 files changed, 297 insertions(+), 1 deletion(-) -- 2.17.1
