The variable pixel_div can remain zero due to an invalid rate input,
leading to a potential division by zero issue. This patch fixes it and
the function now logs an error and returns early.
Additionally, this patch resolves trailing whitespace issues detected
by checkpatch.pl in the same file.
Signed-off-by: Dheeraj Reddy Jonnalagadda <dheeraj.linuxdev@xxxxxxxxx>
---
drivers/gpu/drm/msm/dp/dp_catalog.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c
index b4c8856fb25d..e170f70f1d42 100644
--- a/drivers/gpu/drm/msm/dp/dp_catalog.c
+++ b/drivers/gpu/drm/msm/dp/dp_catalog.c
@@ -225,7 +225,7 @@ int msm_dp_catalog_aux_clear_hw_interrupts(struct msm_dp_catalog *msm_dp_catalog
* This function reset AUX controller
*
* NOTE: reset AUX controller will also clear any pending HPD related interrupts
- *
+ *
*/
void msm_dp_catalog_aux_reset(struct msm_dp_catalog *msm_dp_catalog)
{
@@ -487,8 +487,10 @@ void msm_dp_catalog_ctrl_config_msa(struct msm_dp_catalog *msm_dp_catalog,
pixel_div = 2;
else if (rate == link_rate_hbr2)
pixel_div = 4;
- else
+ else {
DRM_ERROR("Invalid pixel mux divider\n");
+ return;
+ }
dispcc_input_rate = (rate * 10) / pixel_div;
@@ -579,7 +581,7 @@ u32 msm_dp_catalog_hw_revision(const struct msm_dp_catalog *msm_dp_catalog)
* This function reset the DP controller
*
* NOTE: reset DP controller will also clear any pending HPD related interrupts
- *
+ *
*/
void msm_dp_catalog_ctrl_reset(struct msm_dp_catalog *msm_dp_catalog)
{
--
2.34.1
