On Tue, Oct 29, 2024 at 01:18:43PM +0100, Andrew Lunn wrote: > On Mon, Oct 28, 2024 at 09:24:58PM +0100, Jan Petrous via B4 Relay wrote: > > From: "Jan Petrous (OSS)" <jan.petrous@xxxxxxxxxxx> > > > > The PTP clock is read by stmmac_platform during DT parse. > > On S32G/R the clock is not ready and returns 0. Postpone > > reading of the clock on PTP init. > > This needs more explanation as to why this is a feature, not a bug, > for the PTP clock. > Thanks for comment. I did a homework and found out the root cause is using PTP clocks before they are properly enabled. As I understand, the clocks, especially the composite variant, require preparation and/or enabling them, what is not managed correctly for PTP clocks when stmmac_platform is used. In this case, the PTP clock value is read this way: stmmac_probe_config_dt: // https://github.com/torvalds/linux/blob/4a5df37964673effcd9f84041f7423206a5ae5f2/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c#L634 /* Fall-back to main clock in case of no PTP ref is passed */ plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref"); if (IS_ERR(plat->clk_ptp_ref)) { plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk); plat->clk_ptp_ref = NULL; dev_info(&pdev->dev, "PTP uses main clock\n"); } else { plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref); dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate); } If I change getter to enabled getter: plat->clk_ptp_ref = devm_clk_get_enabled(&pdev->dev, "ptp_ref"); The driver got valid rate and the patch is not needed anymore. So, if I didn't miss something, it seems like I have to replace the current patch with one fixing clk getter. BR. /Jan
