Hello,
> Currently, if 'Global IRQ' is supported by the platform, only the Link up
> interrupt is enabled in the PARF_INT_ALL_MASK register. This masks MSIs
> on some platforms. The MSI bits in PARF_INT_ALL_MASK register are enabled
> by default in the hardware, but commit 4581403f6792 ("PCI: qcom: Enumerate
> endpoints based on Link up event in 'global_irq' interrupt") disabled them
> and enabled only the Link up interrupt. While MSI continued to work on the
> SM8450 platform that was used to test the offending commit, on other
> platforms like SM8250, X1E80100, MSIs are getting masked. And they require
> enabling the MSI interrupt bits in the register to unmask (enable) the
> MSIs.
>
> Even though the MSI interrupt enable bits in PARF_INT_ALL_MASK are
> described as 'diagnostic' interrupts in the internal documentation,
> disabling them masks MSI on these platforms. Due to this, MSIs were not
> reported to be received these platforms while supporting 'Global IRQ'.
>
> So enable the MSI interrupts along with the Link up interrupt in the
> PARF_INT_ALL_MASK register if 'Global IRQ' is supported. This ensures that
> the MSIs continue to work and also the driver is able to catch the Link
> up interrupt for enumerating endpoint devices.
Applied to controller/qcom, thank you!
[01/01] PCI: qcom: Enable MSI interrupts together with Link up if 'Global IRQ' is supported
https://git.kernel.org/pci/pci/c/ba4a2e2317b9
Krzysztof
