On 10/18/2024 2:10 PM, Dmitry Baryshkov wrote:
The MSM HDMI driver supports interlaced modes. Set the corresponding flag to allow interlaced modes on the corresponding connectors. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx> --- drivers/gpu/drm/msm/hdmi/hdmi_bridge.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c index 4a5b5112227f..643c152e6380 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c @@ -336,6 +336,7 @@ int msm_hdmi_bridge_init(struct hdmi *hdmi) bridge->funcs = &msm_hdmi_bridge_funcs; bridge->ddc = hdmi->i2c; bridge->type = DRM_MODE_CONNECTOR_HDMIA; + bridge->interlace_allowed = true; bridge->ops = DRM_BRIDGE_OP_HPD | DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;
I had quite a bit of discussion on this internally because this spans quite a few generations of chipsets.
On very old hardware, even before msm8996, there was dedicated hardware de-interlacer. But even on msm8996 or other HDMI supported chipsets where the handling of if (mode->flags & DRM_MODE_FLAG_INTERLACE) is present, these were because its carry forward of older interface code.
The way we handle interlaced formats today, is software needs to handle the part of dividing height / 2 and width * 2 and adjust the source crop if necessary. This part has moved to userspace for recent chips.
Othwerise, we will need to add this part in the dpu driver to adjust this. I am not seeing this part there yet. So may I know how you validated this change? Something similar to :
https://git.codelinaro.org/clo/la/kernel/msm-4.4/-/blob/caf_migration/LE.UM.1.3.r3.25/drivers/gpu/drm/msm/sde/sde_plane.c#L1340 If we add this part first to dpu code, then we can mark interlace_allowed.
--- base-commit: c4f364c621d0d509190d673d80a9b23250607b4a change-id: 20241019-msm-hdmi-interlaced-1508c1dc9bb9 Best regards,
