On 10/26/2024 1:46 AM, Konrad Dybcio wrote:
On 11.10.2024 12:41 PM, Song Xue wrote:
The QCS615 platform has LLCC(Last Level Cache Controller) as the system
cache controller. It includes 1 LLCC instance and 1 LLCC broadcast
interface.
Add LLCC node support for the QCS615 platform.
Signed-off-by: Song Xue <quic_songxue@xxxxxxxxxxx>
---
This patch series depends on below patch series:
https://lore.kernel.org/all/20240926-add_initial_support_for_qcs615-v3-0-e37617e91c62@xxxxxxxxxxx/
https://lore.kernel.org/linux-arm-msm/20241010-add_llcc_support_for_qcs615-v2-1-044432450a75@xxxxxxxxxxx/
---
arch/arm64/boot/dts/qcom/qcs615.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
index ac4c4c751da1fbb28865877555ba317677bc6bd2..b718a4d2270d64ed43c2eca078bfe52b78ff680c 100644
--- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
@@ -495,6 +495,14 @@ dc_noc: interconnect@9160000 {
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ llcc: system-cache-controller@9200000 {
+ compatible = "qcom,qcs615-llcc";
+ reg = <0x0 0x9200000 0x0 0x50000>,
+ <0x0 0x9600000 0x0 0x50000>;
Please pad both addresses to 8 hex digits (e.g. 0x09200000)
With that:
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
Konrad
let me fix it.
Thanks,
Song
