On 10/9/2024 7:24 PM, Jie Gan wrote:
The Coresight TMC Control Unit(CTCU) device hosts miscellaneous configuration
registers to control various features related to TMC ETR device.
The CTCU device works as a helper device physically connected to the TMC ETR device.
---------------------------------------------------------
|ETR0| |ETR1|
. \ / .
. \ / .
. \ / .
. \ / .
---------------------------------------------------
ETR0ATID0-ETR0ATID3 CTCU ETR1ATID0-ETR1ATID3
---------------------------------------------------
Each ETR has four ATID registers with 128 bits long in total.
e.g. ETR0ATID0-ETR0ATID3 registers are used by ETR0 device.
Based on the trace id which is programed in CTCU ATID register of
specific ETR, trace data with that trace id can get into ETR's buffer
while other trace data gets ignored. The number of CTCU ATID registers
depends on the number of defined TMC ETR devices. For example, two TMC
ETR devices need eight ATID registers. ETR0 with ETR0ATID0-ETR0ATID3
and ETR1 with ETR1ATID0-ETRATID3.
The significant challenge in enabling the data filter function is how
to collect the trace ID of the source device. The introduction of
trace_id callback function addresses this challenge. The callback function
collects trace ID of the device and return it back. The trace ID will be
stored in the structure called cs_sink_data and transmitted to helper
and sink devices.
The cs_sink_data structure is created to address how to transmit
parameters needs by coresight_enable_path/coresight_disbale_path
functions.
Here is an example of the struct cs_sink_data:
struct cs_sink_data {
struct perf_output_handle *handle; //used by perf mode
struct coresight_device *sink; //used to retrieve atid_offset
u32 traceid; //traceid needed by CTCU
};
The atid_offset mentioned before is the offset to ATID register in CTCU
device.
Enabling the source device will configure one bit in the ATID register based
on its trace ID.
Disabling the source devices will reset the bit in the AITD register
based on its trace ID.
[...]
Kindly remainder, Please help to review the patch series.
Thanks,
Jie
