On Tue, 22 Oct 2024 11:45:56 +0200, Gabor Juhos wrote: > The comment before the config of the GPLL3 PLL says that the > PLL should run at 930 MHz. In contrary to this, calculating > the frequency from the current configuration values by using > 19.2 MHz as input frequency defined in 'qcs404.dtsi', it gives > 921.6 MHz: > > $ xo=19200000; l=48; alpha=0x0; alpha_hi=0x0 > $ echo "$xo * ($((l)) + $(((alpha_hi << 32 | alpha) >> 8)) / 2^32)" | bc -l > 921600000.00000000000000000000 > > [...] Applied, thanks! [1/1] clk: qcom: gcc-qcs404: fix initial rate of GPLL3 commit: 36d202241d234fa4ac50743510d098ad52bd193a Best regards, -- Bjorn Andersson <andersson@xxxxxxxxxx>