Re: [PATCH v3] clk: qcom: clk-alpha-pll: Fix pll post div mask when width is not set

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On Sun, 06 Oct 2024 22:51:58 +0200, Barnabás Czémán wrote:
> Many qcom clock drivers do not have .width set. In that case value of
> (p)->width - 1 will be negative which breaks clock tree. Fix this
> by checking if width is zero, and pass 3 to GENMASK if that's the case.
> 
> 

Applied, thanks!

[1/1] clk: qcom: clk-alpha-pll: Fix pll post div mask when width is not set
      commit: e02bfea4d7ef587bb285ad5825da4e1973ac8263

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>




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