Re: [PATCH] Revert "arm64: dts: qcom: sm8250: switch UFS QMP PHY to new style of bindings"

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On Thu, 3 Oct 2024 at 20:05, Sumit Semwal <sumit.semwal@xxxxxxxxxx> wrote:
>
> This reverts commit cf9c7b34b90b622254b236a9a43737b6059a1c14.
>
> This commit breaks UFS on RB5 in the 6.1 LTS kernels. The original patch
> author suggests that this is not a stable kernel patch, hence reverting
> it.
Minor correction here: this is applicable to both 6.1 and 5.15 LTS
kernels; patch applies as-is on both.
>
> This was reported during testing with 6.1.103 / 5.15.165 LTS kernels
> merged in the respective Android Common Kernel branches.
>
> Signed-off-by: Sumit Semwal <sumit.semwal@xxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++++++++++------
>  1 file changed, 14 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index 6a2852584405..c9780b2afd2f 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -2125,7 +2125,7 @@ ufs_mem_hc: ufshc@1d84000 {
>                                      "jedec,ufs-2.0";
>                         reg = <0 0x01d84000 0 0x3000>;
>                         interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
> -                       phys = <&ufs_mem_phy>;
> +                       phys = <&ufs_mem_phy_lanes>;
>                         phy-names = "ufsphy";
>                         lanes-per-direction = <2>;
>                         #reset-cells = <1>;
> @@ -2169,8 +2169,10 @@ ufs_mem_hc: ufshc@1d84000 {
>
>                 ufs_mem_phy: phy@1d87000 {
>                         compatible = "qcom,sm8250-qmp-ufs-phy";
> -                       reg = <0 0x01d87000 0 0x1000>;
> -
> +                       reg = <0 0x01d87000 0 0x1c0>;
> +                       #address-cells = <2>;
> +                       #size-cells = <2>;
> +                       ranges;
>                         clock-names = "ref",
>                                       "ref_aux";
>                         clocks = <&rpmhcc RPMH_CXO_CLK>,
> @@ -2178,12 +2180,18 @@ ufs_mem_phy: phy@1d87000 {
>
>                         resets = <&ufs_mem_hc 0>;
>                         reset-names = "ufsphy";
> +                       status = "disabled";
>
>                         power-domains = <&gcc UFS_PHY_GDSC>;
>
> -                       #phy-cells = <0>;
> -
> -                       status = "disabled";
> +                       ufs_mem_phy_lanes: phy@1d87400 {
> +                               reg = <0 0x01d87400 0 0x16c>,
> +                                     <0 0x01d87600 0 0x200>,
> +                                     <0 0x01d87c00 0 0x200>,
> +                                     <0 0x01d87800 0 0x16c>,
> +                                     <0 0x01d87a00 0 0x200>;
> +                               #phy-cells = <0>;
> +                       };
>                 };
>
>                 ipa_virt: interconnect@1e00000 {
> --
> 2.46.2
>


-- 
Thanks and regards,

Sumit Semwal (he / him)
Tech Lead - Android, Platforms and Virtualisation
Linaro.org │ Arm Solutions at Light Speed





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