On 25/09/2024 12:43, Jingyi Wang wrote: > Add initial DTSI for QCS8300 SoC. > > Features added in this revision: > - CPUs with PSCI idle states > - Interrupt-controller with PDC wakeup support > - Timers, TCSR Clock Controllers > - Reserved Shared memory > - GCC and RPMHCC > - TLMM > - Interconnect > - QuP with uart > - SMMU > - QFPROM > - Rpmhpd power controller > - UFS > - Inter-Processor Communication Controller > - SRAM > - Remoteprocs including ADSP,CDSP and GPDSP > - BWMONs > > [Zhenhua: added the smmu node] > Co-developed-by: Zhenhua Huang <quic_zhenhuah@xxxxxxxxxxx> > Signed-off-by: Zhenhua Huang <quic_zhenhuah@xxxxxxxxxxx> > [Xin: added ufs/adsp/gpdsp nodes] > Co-developed-by: Xin Liu <quic_liuxin@xxxxxxxxxxx> > Signed-off-by: Xin Liu <quic_liuxin@xxxxxxxxxxx> > [Kyle: added the aoss_qmp node] > Co-developed-by: Kyle Deng <quic_chunkaid@xxxxxxxxxxx> > Signed-off-by: Kyle Deng <quic_chunkaid@xxxxxxxxxxx> > [Tingguo: added the rpmhpd nodes] > Co-developed-by: Tingguo Cheng <quic_tingguoc@xxxxxxxxxxx> > Signed-off-by: Tingguo Cheng <quic_tingguoc@xxxxxxxxxxx> > [Raviteja: added interconnect nodes] > Co-developed-by: Raviteja Laggyshetty <quic_rlaggysh@xxxxxxxxxxx> > Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@xxxxxxxxxxx> > Signed-off-by: Jingyi Wang <quic_jingyw@xxxxxxxxxxx> > --- Reviewed-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx> Best regards, Krzysztof
