On 24-09-03 09:09:52, Johan Hovold wrote:
> On Mon, Sep 02, 2024 at 06:01:35PM +0300, Abel Vesa wrote:
> > The Qualcomm Snapdragon X Elite CRD board has 3 USB Type-C ports,
> > all of them supporting external DP altmode. Between each QMP
> > combo PHY and the corresponding Type-C port, sits one Parade PS8830
> > retimer which handles both orientation and SBU muxing. Add nodes for
> > each retimer, fix the graphs between connectors and the PHYs accordingly,
> > add the voltage regulators needed by each retimer and then enable all
> > 3 remaining DPUs.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 414 +++++++++++++++++++++++++++++-
> > 1 file changed, 408 insertions(+), 6 deletions(-)
>
> > @@ -288,6 +312,134 @@ vreg_edp_3p3: regulator-edp-3p3 {
> > regulator-boot-on;
> > };
> >
> > + vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
> > + compatible = "regulator-fixed";
> > +
> > + regulator-name = "VREG_RTMR0_1P15";
> > + regulator-min-microvolt = <1150000>;
> > + regulator-max-microvolt = <1150000>;
> > +
> > + gpio = <&pm8550ve_8_gpios 8 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > +
> > + pinctrl-0 = <&rtmr0_1p15_reg_en>;
> > + pinctrl-names = "default";
> > + };
>
> > + vreg_rtmr2_3p3: regulator-rtmr2-3p3 {
> > + compatible = "regulator-fixed";
> > +
> > + regulator-name = "VREG_RTMR2_3P3";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > +
> > + gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&rtmr2_3p3_reg_en>;
> > + };
> > +
> > +
> > +
>
> Double stray newline.
>
> Also move these nodes below the nvme one to maintain sort order.
>
Will do.
> > vreg_nvme: regulator-nvme {
> > compatible = "regulator-fixed";
> >
> > @@ -709,6 +861,163 @@ keyboard@3a {
> > };
> > };
>
> > +&i2c7 {
> > + clock-frequency = <400000>;
> > +
> > + status = "okay";
> > +
> > + typec-mux@8 {
> > + compatible = "parade,ps8830";
> > + reg = <0x8>;
> > +
> > + clocks = <&rpmhcc RPMH_RF_CLK4>;
> > + clock-names = "xo";
> > +
> > + vdd15-supply = <&vreg_rtmr1_1p15>;
> > + vdd18-supply = <&vreg_rtmr1_1p8>;
> > + vdd33-supply = <&vreg_rtmr1_3p3>;
> > +
> > + reset-gpios = <&tlmm 176 GPIO_ACTIVE_HIGH>;
> > +
> > + retimer-switch;
> > + orientation-switch;
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > +
> > + retimer_ss1_ss_out: endpoint {
> > + remote-endpoint = <&pmic_glink_ss1_ss_in>;
> > + };
> > + };
> > +
> > + port@1 {
> > + reg = <1>;
> > +
> > + retimer_ss1_ss_in: endpoint {
> > + remote-endpoint = <&usb_1_ss1_qmpphy_out>;
> > + };
> > + };
> > +
> > + port@2 {
> > + reg = <2>;
> > +
> > + retimer_ss1_con_sbu_out: endpoint {
> > + remote-endpoint = <&pmic_glink_ss1_con_sbu_in>;
> > + };
> > + };
> > +
>
> Stray newline.
>
Will drop.
> > + };
> > + };
> > +};
>
> > +&pm8550_gpios {
> > + rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state {
> > + pins = "gpio11";
> > + function = "func1";
> > + input-disable;
> > + output-enable;
> > + };
> > +};
> > +
> > +&pm8550ve_8_gpios {
> > + rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state {
> > + pins = "gpio8";
> > + function = "func1";
> > + input-disable;
> > + output-enable;
> > + };
> > +};
> > +
> > +&pm8550ve_9_gpios {
> > + rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state {
> > + pins = "gpio8";
> > + function = "func1";
> > + input-disable;
> > + output-enable;
> > + };
> > +};
>
> Shouldn't you specify the drive strength here as well? (Same on T14s).
>
Will do.
> Johan
Thanks for reviewing.
Abel
