On Wed, Sep 11, 2024 at 08:56:25PM +0530, Manivannan Sadhasivam via B4 Relay wrote: > This series adds 16.0 GT/s specific equalization and RX lane margining settings > to the Qcom RC and EP drivers. This series is mandatory for the stable operation > of the PCIe link at 16.0 GT/s on the Qcom platforms. > Manivannan Sadhasivam (2): > PCI: dwc: Rename 'dw_pcie::link_gen' to 'dw_pcie::max_link_speed' > PCI: dwc: Always cache the maximum link speed value in dw_pcie::max_link_speed > > Shashank Babu Chinta Venkata (2): > PCI: qcom: Add equalization settings for 16.0 GT/s > PCI: qcom: Add RX lane margining settings for 16.0 GT/s Thanks for respinning, Mani. Bjorn, it would be great to have these in 6.12 since we're currently seeing lots of NVMe link errors on x1e80100 platforms (e.g. the Lenovo ThinkPad T14s) without them. These errors are also blocking the enabling of using the GIC ITS for interrupts since that will cause all these AER reports to spam the logs. So if you pick this one up, please consider also picking up: https://lore.kernel.org/lkml/20240711090250.20827-1-johan+linaro@xxxxxxxxxx/ [ Note that the later added PCIe5 RC does not currently support ITS. ] Also note that users of these machines have been running with ITS support enabled for months now when using my x1e80100 wip branches, such as: https://github.com/jhovold/linux/tree/wip/x1e80100-6.11-rc7 So this is all quite well-tested by now. Johan
