On 8/29/2024 3:26 PM, Bryan O'Donoghue wrote:
On 29/08/2024 10:24, Mukesh Kumar Savaliya wrote:
This Series adds support to share QUP based I2C SE between subsystems.
Each subsystem should have its own GPII which interacts between SE and
GSI DMA HW engine.
What is SE ?
GPII - general purpose interrupt ... ?
You have too many acronyms here, which makes reading and understanding
your cover letter a bit hard.
Please define at least the term SE in your cover letter and in your patch.
In the patch you use the term TRE which without diving into the code I
vaguely remember is a register..
- GPII
- GSI
- SE
- TRE
Need to be defined to make what's going on in this series more "grokable".
A cover letter should assume a reviewer is familiar with the basics of a
system - no need to define what I2C is but, similarly shouldn't assume a
reviewer is numerate in the taxonomy of vendor specific architecture
e.g. whats SE ?
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Sure, Understood what to mention instead of short names. Let me have
cover letter and upload next patch.
bod
