Hi Bryan,
On 8/16/2024 10:21 PM, Bryan O'Donoghue wrote:
On 12/08/2024 15:41, Depeng Shao wrote:
+#define CSID_RDI_CFG1(rdi) (0x510 + 0x100 * (rdi))
+#define RDI_CFG1_DROP_H_EN 5
+#define RDI_CFG1_DROP_V_EN 6
+#define RDI_CFG1_CROP_H_EN 7
+#define RDI_CFG1_CROP_V_EN 8
+#define RDI_CFG1_PIX_STORE 10
Hmm - is bit 10 valid ? I'm looking at a register set derived from 8550
and don't see it
The bit10 is valid in sm8550, but it isn't there in sm8750.
+#define RDI_CFG1_PACKING_FORMAT 15
Bit 15 selects either BIT(15) = 0 PACKING_FORMAT_PLAIN or BIT(15) = 1
PACKING_FORMAT_MIPI
Please give this bit a more descriptive name =>
#define RDI_CFG1_PACKING_FORMAT_MIPI 15
Sure. I will update it.
Thanks,
Depeng
