On August 16, 2024 12:05:42 AM GMT+07:00, srinivas.kandagatla@xxxxxxxxxx wrote: >From: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx> > >Move lpass codecs va and wsa macros to use the clks directly from >AFE clock controller instead of going via gfm mux like other codec macros >and SoCs. > >This makes it more align with the other SoCs and codec macros in this SoC >which take AFE clocks directly. This will also avoid an extra clk mux layer, >provides consistency and avoids the buggy mux driver which will be removed. > >This should also fix RB5 audio. So, is it a fix or an improvement? In the former case, it misses the description of the issue and the Fixes tag. In the later case the commit message shouldn't be mentioning 'fix'. > >Remove the gfm mux drivers for both audiocc and aoncc. > >Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxx> >--- >DT bindings changes to fix the incorrect number of clocks is available >at >https://mailman.alsa-project.org/hyperkitty/list/alsa-devel@xxxxxxxxxxxxxxxx/thread/BWBTJHLNBQIMPUQNR274CPYXRBIBAYP5/ >CHECK_DTBS=y might fail without this bindings change patch. > > > arch/arm64/boot/dts/qcom/sm8250.dtsi | 31 ++++------------------------ > 1 file changed, 4 insertions(+), 27 deletions(-) > >diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi >index 9d6c97d1fd9d..630f4eff20bf 100644 >--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi >+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi >@@ -8,8 +8,6 @@ > #include <dt-bindings/clock/qcom,gcc-sm8250.h> > #include <dt-bindings/clock/qcom,gpucc-sm8250.h> > #include <dt-bindings/clock/qcom,rpmh.h> >-#include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h> >-#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h> > #include <dt-bindings/dma/qcom-gpi.h> > #include <dt-bindings/gpio/gpio.h> > #include <dt-bindings/interconnect/qcom,osm-l3.h> >@@ -2633,14 +2631,13 @@ tcsr: syscon@1fc0000 { > wsamacro: codec@3240000 { > compatible = "qcom,sm8250-lpass-wsa-macro"; > reg = <0 0x03240000 0 0x1000>; >- clocks = <&audiocc LPASS_CDC_WSA_MCLK>, >- <&audiocc LPASS_CDC_WSA_NPL>, >+ clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >+ <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >- <&aoncc LPASS_CDC_VA_MCLK>, > <&vamacro>; > >- clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen"; >+ clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; > > #clock-cells = <0>; > clock-output-names = "mclk"; >@@ -2674,20 +2671,10 @@ swr0: soundwire@3250000 { > status = "disabled"; > }; > >- audiocc: clock-controller@3300000 { >- compatible = "qcom,sm8250-lpass-audiocc"; >- reg = <0 0x03300000 0 0x30000>; >- #clock-cells = <1>; >- clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >- <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >- <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; >- clock-names = "core", "audio", "bus"; >- }; >- > vamacro: codec@3370000 { > compatible = "qcom,sm8250-lpass-va-macro"; > reg = <0 0x03370000 0 0x1000>; >- clocks = <&aoncc LPASS_CDC_VA_MCLK>, >+ clocks = <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; > >@@ -2792,16 +2779,6 @@ swr2: soundwire@3230000 { > #size-cells = <0>; > }; > >- aoncc: clock-controller@3380000 { >- compatible = "qcom,sm8250-lpass-aoncc"; >- reg = <0 0x03380000 0 0x40000>; >- #clock-cells = <1>; >- clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >- <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >- <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; >- clock-names = "core", "audio", "bus"; >- }; >- > lpass_tlmm: pinctrl@33c0000 { > compatible = "qcom,sm8250-lpass-lpi-pinctrl"; > reg = <0 0x033c0000 0x0 0x20000>, -- With best wishes Dmitry
