On 24-07-10 16:07:23, Konrad Dybcio wrote:
> The 32-bit BAR spaces are reaching outside their assigned register
> regions. Shrink them to match their actual sizes.
> While at it, unify the style.
>
> Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Also tested on CRD, so:
Tested-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index 7bca5fcd7d52..bc5b4f5ea127 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -2895,9 +2895,9 @@ pcie6a: pci@1bf8000 {
> "mhi";
> #address-cells = <3>;
> #size-cells = <2>;
> - ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>,
> - <0x02000000 0 0x70300000 0 0x70300000 0 0x3d00000>;
> - bus-range = <0 0xff>;
> + ranges = <0x01000000 0x0 0x00000000 0x0 0x70200000 0x0 0x100000>,
> + <0x02000000 0x0 0x70300000 0x0 0x70300000 0x0 0x1d00000>;
> + bus-range = <0x00 0xff>;
>
> dma-coherent;
>
> @@ -3016,8 +3016,8 @@ pcie4: pci@1c08000 {
> "mhi";
> #address-cells = <3>;
> #size-cells = <2>;
> - ranges = <0x01000000 0 0x00000000 0 0x7c200000 0 0x100000>,
> - <0x02000000 0 0x7c300000 0 0x7c300000 0 0x3d00000>;
> + ranges = <0x01000000 0x0 0x00000000 0x0 0x7c200000 0x0 0x100000>,
> + <0x02000000 0x0 0x7c300000 0x0 0x7c300000 0x0 0x1d00000>;
> bus-range = <0x00 0xff>;
>
> dma-coherent;
>
> ---
> base-commit: 0b58e108042b0ed28a71cd7edf5175999955b233
> change-id: 20240710-topic-barman-57a52f7de103
>
> Best regards,
> --
> Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
>
