On 10.07.2024 11:47 AM, Krzysztof Kozlowski wrote:
> On 10/07/2024 11:41, Viken Dadhaniya wrote:
>> Add missing UART configuration for sa8775.
>>
>> Signed-off-by: Viken Dadhaniya <quic_vdadhani@xxxxxxxxxxx>
>> ---
>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 231 ++++++++++++++++++++++++++
>> 1 file changed, 231 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> index 23f1b2e5e624..c107ee40341d 100644
>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>> @@ -1,6 +1,7 @@
>> // SPDX-License-Identifier: BSD-3-Clause
>> /*
>> * Copyright (c) 2023, Linaro Limited
>> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
>> */
>>
>> #include <dt-bindings/interconnect/qcom,icc.h>
>> @@ -657,6 +658,21 @@
>> status = "disabled";
>> };
>>
>> + uart14: serial@880000 {
>> + compatible = "qcom,geni-uart";
>> + reg = <0x0 0x00880000 0x0 0x4000>;
>> + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
>> + clock-names = "se";
>> + interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
>> + &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
>> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
>> + &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>;
>> + interconnect-names = "qup-core", "qup-config";
>> + power-domains = <&rpmhpd SA8775P_CX>;
>
> All the clocks, interconenct and power domains look to me questionable.
> AFAIK, most of it (if not all) is going to be removed.
Yeah.. I'm lukewarm on accepting any sa8775p changes until that qcs9100(?)
situation is squared out first
Konrad
