On Fri, 28 Jun 2024 11:08:00 +0300, Abel Vesa wrote:
> In case of all pipe clocks, there is a QMP PHY clock that is feeding them.
> If, for whatever reason, the clock from the PHY is not enabled, halt bit
> will not get set, and the clock controller driver will assume the clock
> is stuck in a specific state. The way this is supposed to be properly
> fixed is to defer the checking of the halt bit until after the PHY clock
> has been initialized, but doing so complicates the clock controller
> driver. In fact, since these pipe clocks are consumed by the PHY, while
> the PHY is also the one providing the source, if clock gets stuck, the PHY
> driver would be to blame. So instead of checking the halt bit in here,
> just skip it and assume the PHY driver is handling the source clock
> correctly.
>
> [...]
Applied, thanks!
[1/1] clk: qcom: gcc-x1e80100: Fix halt_check for all pipe clocks
commit: f27e42c7d3ff8ddfc57273efd1e8642ea89bad90
Best regards,
--
Bjorn Andersson <andersson@xxxxxxxxxx>
