On 04/11, Ulf Hansson wrote: > + Adrian > > On 5 April 2016 at 09:46, Sreedhar Sambangi <ssambang@xxxxxxxxxxxxxx> wrote: > > The DLL clock has to be enabled until the correct > > clock frequency is delivered to DLL > > '1'(default) - DLL clock is disabled > > '0' - dll clock has legacly clock enable. > > > > Signed-off-by: Varadarajan Narayanan <varada@xxxxxxxxxxxxxx> > > Signed-off-by: Sreedhar Sambangi <ssambang@xxxxxxxxxxxxxx> > > Adrian Hunter is the maintainer for sdhci, next time make sure to post to him. > > As this seems like fairly trivial change I decided to pick it up > anyway. So applied for next! > > Note, that I changed the prefix of the commit message header to "mmc". > I'm not sure this patch is actually right. In the downstream sources we do quite a few more reads and writes if we need to poke this second DLL configuration register. Furthermore, on msm8974 and apq8084 this register doesn't even exist so writing to it may cause problems if it isn't write ignored (I haven't checked). I think we should follow the downstream kernel design instead. Namely, reading the major/minor version registers to figure out if we should be touching this register in the first place, and then adding a clock property to the DT binding for the XO source so we can determine the XO frequency. It seems that we need this frequency to figure out how to program the second DLL configuration register appropriately. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
