On Wed, Jun 26, 2024 at 04:09:54PM GMT, Varadarajan Narayanan wrote:
> cpr3 code assumes that 'acc_desc' is available for SoCs
> implementing CPR version 4 or less. However, IPQ9574 SoC
> implements CPRv4 without ACC. This causes NULL pointer accesses
> resulting in crashes. Hence, check is 'acc_desc' is populated
> before using it.
>
> Signed-off-by: Varadarajan Narayanan <quic_varada@xxxxxxxxxxx>
> ---
> drivers/pmdomain/qcom/cpr3.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pmdomain/qcom/cpr3.c b/drivers/pmdomain/qcom/cpr3.c
> index c7790a71e74f..c28028be50d8 100644
> --- a/drivers/pmdomain/qcom/cpr3.c
> +++ b/drivers/pmdomain/qcom/cpr3.c
> @@ -2399,12 +2399,12 @@ static int cpr_pd_attach_dev(struct generic_pm_domain *domain,
> if (ret)
> goto exit;
>
> - if (acc_desc->config)
> + if (acc_desc && acc_desc->config)
> regmap_multi_reg_write(drv->tcsr, acc_desc->config,
> acc_desc->num_regs_per_fuse);
>
> /* Enable ACC if required */
> - if (acc_desc->enable_mask)
> + if (acc_desc && acc_desc->enable_mask)
> regmap_update_bits(drv->tcsr, acc_desc->enable_reg,
> acc_desc->enable_mask,
> acc_desc->enable_mask);
> @@ -2676,7 +2676,7 @@ static int cpr_probe(struct platform_device *pdev)
> desc = data->cpr_desc;
>
> /* CPRh disallows MEM-ACC access from the HLOS */
> - if (!data->acc_desc && desc->cpr_type < CTRL_TYPE_CPRH)
> + if (!data->acc_desc && desc->cpr_type < CTRL_TYPE_CPR4)
> return -EINVAL;
>
> drv = devm_kzalloc(dev, sizeof(*drv), GFP_KERNEL);
> @@ -2703,7 +2703,7 @@ static int cpr_probe(struct platform_device *pdev)
>
> mutex_init(&drv->lock);
>
> - if (desc->cpr_type < CTRL_TYPE_CPRH) {
> + if (desc->cpr_type < CTRL_TYPE_CPR4) {
This is incorrect. This disables ACC usage for CPR4, while GFX CPR on
MSM8998 (which is CPR4) seems to use ACC.
> np = of_parse_phandle(dev->of_node, "qcom,acc", 0);
> if (!np)
> return -ENODEV;
> --
> 2.34.1
>
--
With best wishes
Dmitry
