On 25.06.2024 7:21 PM, Rob Clark wrote:
> On Wed, Jun 5, 2024 at 1:10 PM Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> wrote:
>>
>> Add speebin data for A740, as found on SM8550 and derivative SoCs.
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
>> ---
>> drivers/gpu/drm/msm/adreno/adreno_device.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
>> index 901ef767e491..e00eef8099ae 100644
>> --- a/drivers/gpu/drm/msm/adreno/adreno_device.c
>> +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
>> @@ -570,6 +570,10 @@ static const struct adreno_info gpulist[] = {
>> .zapfw = "a740_zap.mdt",
>> .hwcg = a740_hwcg,
>> .address_space_size = SZ_16G,
>> + .speedbins = ADRENO_SPEEDBINS(
>> + { ADRENO_SKU_ID(SOCINFO_FC_AC), 0 },
>> + { ADRENO_SKU_ID(SOCINFO_FC_AF), 0 },
>
> Did you really mean for these both to map to the same speedbin?
Yes
There were more entries previously but the info was unclear and
different between BSPs..
For non-development SoCs it seems that "everything except FC_AC, FC_AF
should be speedbin 1", but what the values are for said "everything" are
not known, so that's an exercise left to the user..
Konrad
