Apart from a bunch of bindings updates, add support for the a7pll found on the SoC and wire up everything in the dtsi. And finally switch over to using apcs via mbox interface to stop using the apcs via syscon. Only a limited list of CPU frequencies are supported for now, higher ones require speedbin support which I plan to work on after this lands. Signed-off-by: Luca Weiss <luca@xxxxxxxxxxxx> --- Luca Weiss (7): dt-bindings: mailbox: qcom: add compatible for MSM8226 SoC dt-bindings: clock: qcom,a53pll: Allow opp-table subnode dt-bindings: clock: qcom,a53pll: Add msm8226-a7pll compatible clk: qcom: a53-pll: Add MSM8226 a7pll support ARM: dts: qcom: msm8226: Add CPU frequency scaling support ARM: dts: qcom: msm8226: Hook up CPU cooling ARM: dts: qcom: msm8226: Convert APCS usages to mbox interface .../devicetree/bindings/clock/qcom,a53pll.yaml | 4 + .../bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 + arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 134 ++++++++++++++++++++- drivers/clk/qcom/a53-pll.c | 1 + 4 files changed, 134 insertions(+), 6 deletions(-) --- base-commit: 0efa3123a1658dbafdace0bfcdcc4f34eebc7f9f change-id: 20240619-msm8226-cpufreq-788b0bf0256a Best regards, -- Luca Weiss <luca@xxxxxxxxxxxx>