On Tue, Jun 18, 2024 at 02:57:11PM +0530, Komal Bajaj wrote:
> Add secure qfprom node and also add properties for multi channel
> DDR. This is required for LLCC driver to pick the correct LLCC
> configuration.
>
> Fixes: 6209038f131f ("arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller")
> Signed-off-by: Komal Bajaj <quic_kbajaj@xxxxxxxxxxx>
> ---
> Changes in v3:
> * Addressed comment by Konrad
> * Added Fixes tag in commit message as suggested by Dmitry
> * Link to v2: https://lore.kernel.org/linux-arm-msm/20240612063424.2494-1-quic_kbajaj@xxxxxxxxxxx/
>
> Changes in v2:
> * Minor correction in commit message
> * Link to v1: https://lore.kernel.org/linux-arm-msm/20240607113445.2909-1-quic_kbajaj@xxxxxxxxxxx/
> ---
> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> index 7a77f7a55498..27f9fc87079c 100644
> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> @@ -1584,6 +1584,21 @@ system-cache-controller@19200000 {
> reg-names = "llcc0_base",
> "llcc_broadcast_base";
> interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> +
> + nvmem-cells = <&multi_chan_ddr>;
> + nvmem-cell-names = "multi-chan-ddr";
> + };
> +
> + sec_qfprom: efuse@221c8000 {
> + compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom";
> + reg = <0 0x221c8000 0 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + multi_chan_ddr: multi-chan-ddr@12b {
> + reg = <0x12b 0x1>;
> + bits = <0 2>;
> + };
LGTM, without this change, LLCC driver for QDU1000 will result in probe failure.
Reviewed-by: Mukesh Ojha <quic_mojha@xxxxxxxxxxx>
-Mukesh
> };
> };
>
> --
> 2.42.0
>
>
