On 6/14/24 12:50, Abel Vesa wrote:
From: Rajendra Nayak <quic_rjendra@xxxxxxxxxxx>
Add tsens and thermal zones nodes for x1e80100 SoC.
Signed-off-by: Rajendra Nayak <quic_rjendra@xxxxxxxxxxx>
Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
---
[...]
+ tsens0: thermal-sensor@c271000 {
+ compatible = "qcom,x1e80100-tsens", "qcom,tsens-v2";
+ reg = <0 0x0c271000 0 0x1000>,
+ <0 0x0c222000 0 0x1000>;
+
+ interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>;
These are normally wired up through PDC so that the system can shut down
even if CPUSS is off
[...]
+ cpu0-0-top-thermal {
+ thermal-sensors = <&tsens0 1>;
Here you have passive trip points with no passive polling, this will
only report threshold crossing events (so e.g. cpufreq throttling will
be broken)
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ trip-point1 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu-critical {
+ temperature = <110000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
[...]
+
+ nsp1-thermal {
+ polling-delay-passive = <10>;
Here you have passive polling, but no passive trip point
+
+ thermal-sensors = <&tsens3 2>;
+
+ trips {
+ trip-point0 {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "hot";
+ };
+
+ nsp1-critical {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+ };
The rest looks okayish
Konrad
